Naviq: An Open-Source System-on-Chip Simulator for Rapid Prototyping, Verification, and Design Space Exploration

arXiv:2611.02023v1 Announce Type: new Abstract: Modern FPGA SoCs are no longer just collections of accelerators on top of a programmable fabric. They combine programmable logic with hardened processors, NoCs, and components that dominate end-to-end performance. Evaluating individual pieces is insufficient; system performance depends on the interplay of SoC components. However, current FPGA SoC simulations provide limited support for this style of evaluation. Vendor simulations capture these interactions but are prohibitively slow for iterative design-space exploration. At the same time, generic software models overly abstract the hardware components that determine real behavior, resulting in less accurate simulations.